{"step": "verc (voltage domains, power, thermal)", "ok": true, "status": "VERC_OK (8 warning(s))"}
{"step": "datasheets + part rules", "ok": true, "status": "SPECCHECK_WARN: 4 warning(s), 12 rule(s) checked", "warn": true}
{"step": "netaudit (graph = schematic = pcb)", "ok": true, "status": "NETAUDIT_OK (0 warning(s))"}
{"step": "KiCad DRC", "ok": true, "status": "DRC_OK"}
{"step": "power loops + decoupling", "ok": true, "status": "LOOPS_OK: 0 error(s), 1 warning(s)"}
{"step": "placement rules", "ok": true, "status": "PLACE_OK: 19 of 41 placement rules outside limits, 12 review finding(s) (warnings); anchors: run/out/place_anchors.png"}
{"step": "JLC CPL emulation", "ok": true, "status": "CPL_OK (5 land-pattern warnings: C23,D1,D2,L1,U3)"}
{"step": "JLC stock (3 boards)", "ok": true, "status": "STOCK_OK"}
{"step": "3D models (warning only)", "ok": true, "status": "MODELS3D_WARN: 10 of 79 part(s) without a 3D model: TP2 Connector_Wire:SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm; Q1 jlc_parts:PDFN-8_L4.9-W5.8-P1.27-LS6.1-BL; TP5 Connector_Wire:SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm; Q5 jlc_parts:PDFN-8_L5.6-W5.2-P1.27-LS6.1-BL; Q4 jlc_parts:PDFN-8_L5.6-W5.2-P1.27-LS6.1-BL; TP3 Connector_Wire:SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm; +4 more - JLC's own model (tools/jlc3d.py boards/<b>) or a checked stand-in in run/models3d.yaml (docs/AGENT_GUIDE.md section 6)", "warn": true}
{"step": "render", "ok": true, "status": ""}