Example · designed with faezor
sim-blinky: STM32F411 board for the firmware simulator
A small STM32F411 board whose firmware runs on pcb.faezor.ai's simulator: three LEDs (blink, PWM, button), a user button, a UART header and an SWD header, USB-C for power.
Inspect in KiCad
The board in KiCad's own PCB editor, in your browser - read-only: zoom, look at every layer and
part, nothing can be changed. It needs desktop Chrome or Edge.
KiCad® (GPL-3.0 ) · source · build
KiCad® is a registered trademark of LF Projects, LLC. faezor is not affiliated with or endorsed by the KiCad project.
Render, top Render, bottom Render, isometric
All checks passed 10 verification steps
OK
verc (voltage domains, power, thermal)VERC_OK (0 warning(s))
Warning
datasheets + part rulesSPECCHECK_WARN: 2 warning(s), 8 rule(s) checked
OK
netaudit (graph = schematic = pcb)NETAUDIT_OK (0 warning(s))
OK
KiCad DRCDRC_OK
OK
power loops + decouplingLOOPS_OK: 0 error(s), 0 warning(s)
OK
placement rulesPLACE_OK: 7 of 13 placement rules outside limits, 7 review finding(s) (warnings); anchors: run/out/place_anchors.png
OK
JLC CPL emulationCPL_OK
OK
JLC stock (3 boards)STOCK_OK
OK
3D models (warning only)MODELS3D_OK: all 30 parts with a body have a 3D model
OK
render
3D model (glTF) board.glb · 163.3 KB Render, top render_top.png · 92.1 KB Render, bottom render_bottom.png · 51.6 KB Render, isometric render_iso.png · 232.5 KB Schematic (PDF) schematic.pdf · 165.1 KB Gerbers + drill for JLCPCB gerbers_jlcpcb.zip · 57.4 KB BOM for JLCPCB assembly bom_jlc.csv · 904 B Pick & place (CPL) cpl_jlc.csv · 1.2 KB Verification summary check_summary.jsonl · 932 B Electrical review (voltage domains, power, thermal) verc_report.md · 7.2 KB
Download all outputs (.zip)
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